LEDA projects

Laboratory for Electronic Design Automation

pAless - Parallel Analog and Logic Electronic Simulation System

Application description

Modern electronic circuits and systems are characterized as very complex (tens of millions of transistors) and mixed-signal (analog and digital), and are applied in complex surroundings that often include sensors, actuators and others that are directly connected to electronics but their behaviour is described in a different non-electrical natural domain (such as mechanical, chemical, biological etc.). Thermal characterization of such systems is of a specific inportance from the integration density point of view. In adition, synthesis of test vectors is crucial from the point of view of industrial acceptability of the designed systems. Finally, electronic application in telecomminication systems requires evaluations in the frequency domain as a specific domain of electrotechnics.

In general, such systems are described in different domains simultaneously the complete description containing large number of algebraic (in complex numbers), ordinary differential, partial differential, and systems of discrete equations (or tables). In addition, parts of the system function is implemented as software that is executed on the hardware described in an appropriate manner.

Design of such large and complex systems is inevitably based on simulations. Repetitive simulations are needed in order to get parameter values ensuring optimal performance or to check excessive number of test vectors needed for production evaluation and field maintenance. Note that the complexity of the task is encountered in both parts of the simulation run: equation formulation phase and equation solution phase.

Simulation time on a single processor based simulation system becomes prohibitive if low level (i.e. differential equations) description is used. Large simulation time is needed for smal portions of the system. Alternatively, high level symulations are performed loosing, however, the direct connection between the system's natural aparmeters and its performance. We propose development of a mixed level, mixed signal, mixed domain electronic simulation that would run on inexpensive parallel computer. That idea is based on the cognition that part of the simulation process is inherently parallel. That stand especially for the equation formulation phase.


Schematic of parallel simulation

Figure 1

The simulation process of modern complex integrated circuits and systems is memory and computationally intensive and algorithmically complex (figure 1). An efficient way to cope with long simulation runtimes and high computational requirements is parallel simulation on a computer grid. PALESS should enable parallel simulation of electronic circuits and systems, characterized as large scale, mixed-signal, and mixed-mode including non-electrical components and phenomena on the grid. It can reduce long simulation runtimes of large mixed-signal circuits and micro-electromechanical systems described by partial differential equations.

The simulation process speedup will increase integrated circuit design efficiency. application performance by the number of MOSFETs (circuit complexity) is shown in figure 2, speedup presents execution time ratio 1CPU/2CPU.  Application performance by the number of cluster nodes is shown in figure 3.

Figure 2   Figure 3

Number of MOSFETs

Simulation speedup

(2 cluster nodes)









  Application performance by the number of cluster nodes

Main features

Additional informations






MPI support.



CPU and local network speed


  1. Bojan Anđelković, Vančo Litovski, Parallel Transistor Level Simulation of Electronic Circuits on a Beowulf Cluster, Proc. of VI Symposium on Industrial Electronics – INDEL 2006, Banja Luka, Bosnia and Herzegovina, November 2006, pp. 32-35
  2. Marko Dimitrijević, Bojan Anđelković, Milan Savić, Vančo Litovski, Gridification and Parallelization of Electronic Circuit Simulator, Proc. of VI Symposium on Industrial Electronics – INDEL 2006, Banja Luka, Bosnia and Herzegovina, November 2006, pp. 95-100
  3. Andjelković, B., Litovski, V., Petković, P.: Implementation and Performance Analysis of Parallel Circuit Simulator, Zbornik radova LI konferencije ETRAN, Herceg Novi, ISBN 978-86-80509-62-4, 04.06.-08.06.2007.
  4. Anđelković, B., Dimitrijević, M., Litovski, V.: Using Grid Computing in Parallel Electronic Circuit Simulation, Proceedings of the Sixteenth International Scientific and Applied Science Conference - Electronics EL'2007, Sozopol, Bulgaria, 19.09.-21.09.2007., Book 4, pp. 109-114